Week of:
1/27 --- Prelab
2/3 -- Lab 1: Combinational Design
2/10 -- Lab 2: Seven Segment Display
2/17 -- Lab 3: Parity Generation and Detection
2/24 -- Lab 4: Adders
3/3 -- Lab 5: Adders II
3/10 -- Lab 6: Serial Link/Multiplexors
3/24 -- Lab 7: Multipliers (Simulation only)
4/7 -- Lab 8: Cache Logic (Simulation only)
4/14 -- Lab 9: Counter Design
4/21 -- Lab 10: Shift Registers