Name:                                                  

 

ECE 201 Fall98 Quiz 3                  Page 1 of 6

 Feel free to pull the pages apart if it makes it easier to refer to figures. Put your name on every loose page!!!

t3-1.gif

1.) Write the FF input functions (In any form):(6 pts)

JA =A+B

 

KA = x'A

 

DB = S(0,3,5,6)

 

2.) Write the output Function:(4 pts)

Z = xB'

3.) Create the state table, including inputs and outputs(15pts)

PSInputFF InpNSOutput
ABXJAKADBABZ
000001010
001000001
010100100
011101110
100110000
101101111
110111010
111100100

4.) Draw the state diagram(5pts)

test34sol.gif

5.) Is this a Mealy or Moore Model circuit?(5 pts)

 
Mealy- Output function Z is a function of the state variables (B') AND the inputs (x)


For the State Diagram Below, and using only T Flip Flops:

 

sdesign.gif

6.) Determine the state table(10 pts)

P.S.InN.S.FFIn.Out
ABXABTATBY
00001010
00100000
01010111
01101001
10000100
10101110
110XXXXX
111XXXXX

7.) Determine the flip-flop input functions and output function(10 pts)

test37sol.gif

8.) Draw your resulting circuit.(5 pts)



test38sol.png

9.) Is your circuit self-correcting? Show how you reached this conclusion.(If yes, do not correct)(10 pts)

-YES-

ABXTATBAB
1101001
1111100

 

10.) Fill in the line for Q in the timing diagrams below, assuming Rising-edge triggered Flip Flops, and all inputs high-active. You may assume Q is initially 0.(10 pts)

test3-4sol.gif

11.) The D FF used in the timing diagram below is Rising-edge triggered, has a setup time of 2 ns, and a hold time of 1 ns. The clock period is 8 ns (125MHz clock). Do any of the transitions below have a chance of working incorrectly? Which ones and why?(10pts)

setholdsol.gif

12.) Complete the following timing diagrams, assuming falling-edge triggered flip-flops, all inputs high-active, and Q initially zero.(10 pts)

clearsol.gif



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