Syllabus

ECE 201

Logic and Computing Devices

 
Goals
:

Understand Number Systems Representations

Understand Boolean Algebra

Understand the design and Analysis of both Combinational and Sequential Circuits.

Understand the Design and Analysis of State Machines

 
Instructor
:

Dan Stanzione

dstanzi@eng.clemson.edu

352 Fluor Daniel EIB/221F Riggs Hall

656-7223(EIB)/656-7367(Riggs)

882-2051 (Home, if you really need it).

Office Hours:

MW 10-10:45

TTH 9:30-11:00, or by appointment.

Feel free to drop by anytime I'm around (which is usually until about 6:30), but I reserve the right to ask you come back later if I'm really busy (except during the office hours above). That seldom happens, so please come by! I enjoy seeing students, and the 1-on-1 approach helps a lot of people. E-mail is an excellent way to get in touch with me, I'm pretty good about responding promptly.

Class Times:

11:15 MW, Riggs 223

8:00 TTH, Riggs 227

Graders
: TBA
Text:

M. Morris Mano, Digital Design, 2nd Edition

The text will be used extensively in this course. Most of the course material and nearly all of the homework problems will come from this book. You'll also need a lab manual for L201 (available at the Student Bookstore, corner of College and Sloan St.), as well as a lab kit, sold by the Student Chapter of the IEEE. Details on getting lab kits will follow.

Software:

I've decided it's time we finally started using computers in computer engineering courses. So, starting last semester we've added a simulation component to the lab. The software package is Digital Simulator 1.1, by Ara Knaian. It is a shareware package, meaning you can download it from my web page for free (for Win3.1, Win95, or Linux). It is also available in the ECE 272 computer lab on the third floor of Riggs Hall. A short tutuorial on this software will be available on the web page and distributed in lecture. Students are required to use the simulator to test ALL of there lab designs prior to wiring up circuits. The simulator may also be useful in helping with some of the more challenging homework problems, particularly in the sequential logic section of the course.

Grading:

Homework: 5%

Tests(3, maybe 2): 40% Total

Lab: 25%

Final: 30%

The instructor reserves the right to curve grades as he sees fit. Only final grades will be curved, not individual test scores. DO NOT COUNT ON THERE BEING A CURVE! Regardless of the curve, the following averages are guaranteed to be the maximum required for the grades below:

90-A80-B

70-C60-D

Homework will be assigned almost every class. It will be collected once each week, and graded by the grader (exams will always be graded by the instructor). Partial credit will be given. Solution to the homework will be posted to the course web page shortly after it is collected. Late homework will not be accepted. Homework is primarily to benefit the student in understanding the material, therefore it is understood that some collaboration between students will occur on homework assignments. However, students should strongly consider contributing to their own homework, as the tests and exam do not allow collaboration, and collectively count 15 times as much as the homework.

Lab grades are assigned by the Teaching Assistants assigned to each lab section, and will be normalized across sections by the instructor. Each student is required to do his/her own work in lab, and each student is r e q u i r e d t o c o m p l e t e e v e r y l a b e x p e r i m e n t .

 Attendance:

The University mandates that I have an attendance policy. My attendance policy is that I have no attendance policy. I will call roll the first couple of classes to figure out who is actually enrolled. No late homework will be accepted, makeup tests are by prior arrangement only. My only real caveat about attendance is I do not give provate lectures. While I am happy to explain things again that were unclear in class, I will not repeat material I discussed in class simply because you weren't there.

Academic Honesty:

The College of Engineering Honor Code applies, to both the class and the lab. Please place the honor pledge on all exams and lab reports.

Curriculum:

To properly prepare you for later classes, we need to cover: Ch. 1,2,3-1-3-8,4,5-1-5-6,6-1-6-4,6-6-6-8, and as much of chapter 7 as is humanly possible. All of this will be covered, so the pace will be kind of fast. Chapters 1 and 2 essentially cover a short discrete math course, defining various number systems and boolean algebra. Chapters 3, 4 and 5 describe combinational circuit design, and 6 and 7 cover sequential circuit design. A test will occur after each of these 3 sections, which I'll try to have coincide with the university drop dates. The last class or 2 will be reserved for some current digital design topics not in the book, probably FPGA design and reconfigurable computing, and maybe a look at a connection machine processing element.

Web Address: http://www.parl.clemson.edu/~dstanzi/e201.html


File translated from TEX by TTH, version 0.9.